TY  - GEN
AB  - Field-programmable gate arrays (FPGAs) are widely deployed on high-energy astrophysics telescopes to preprocess and reduce sensor data read out by front-end electronics. Across instruments, these computational pipelines have similar semantics, sharing common stages such as pedestal subtraction, signal integration, zero-suppression, island detection, and centroiding. However, diverse telescope designs require unique implementations of these algorithms, and the logic is often rewritten from scratch for a new instrument.

As an alternative, High-Level Synthesis (HLS) tools enable these algorithms to be implemented in a high-level language, which eases modifications and enables fast prototyping and deployment. Nonetheless, writing performant HLS code requires augmentation of the code with compiler-specific pragmas. In this work, we illustrate these challenges in the context of the Advanced Particle-astrophysics Telescope (APT), a proposed space-based observatory for gamma-ray sources, and its Antarctic Demonstrator (ADAPT). We implement its front-end algorithms using HLS, demonstrate the use of pragmas to enable optimizations, then explore speed and area tradeoffs, which are especially important given the limited power budget afforded by a satellite instrument. We demonstrate that with HLS, ADAPT will be able to process scintillating tile data from 200,000 gamma-ray events per second.
AD  - Washington University in St. Louis
AD  - Washington University in St. Louis
AD  - Washington University in St. Louis
AD  - Washington University in St. Louis
AD  - Washington University in St. Louis
AD  - Washington University in St. Louis
AD  - Washington University in St. Louis
AD  - Washington University in St. Louis
AD  - Washington University in St. Louis
AU  - Sudvarg, Marion
AU  - Zhao, Chenfeng
AU  - Htet, Ye
AU  - Konst, Meagan
AU  - Lang, Thomas
AU  - Song, Nick
AU  - Chamberlain, Roger
AU  - Buhler, Jeremy
AU  - Buckley, James
DA  - 2024-04-09
DO  - 10.7936/6rxs-103658
DO  - doi
ED  - Sudvarg, Marion
ED  - ContactPerson
ID  - 103658
KW  - Computer and information sciences
KW  - Physical sciences
KW  - high-level synthesis
KW  - astronomy
KW  - FPGA
KW  - field-programmable gate array
KW  - register-transfer level synthesis
KW  - HLS
L1  - https://data.library.wustl.edu/record/103658/files/adapt_fpga-computing-frontiers-2024.zip
L1  - https://data.library.wustl.edu/record/103658/files/README_DOI_10.7936_6RXS-103658_Sudvarg.txt
L2  - https://data.library.wustl.edu/record/103658/files/adapt_fpga-computing-frontiers-2024.zip
L2  - https://data.library.wustl.edu/record/103658/files/README_DOI_10.7936_6RXS-103658_Sudvarg.txt
L4  - https://data.library.wustl.edu/record/103658/files/adapt_fpga-computing-frontiers-2024.zip
L4  - https://data.library.wustl.edu/record/103658/files/README_DOI_10.7936_6RXS-103658_Sudvarg.txt
LA  - eng
LK  - https://data.library.wustl.edu/record/103658/files/adapt_fpga-computing-frontiers-2024.zip
LK  - https://data.library.wustl.edu/record/103658/files/README_DOI_10.7936_6RXS-103658_Sudvarg.txt
N2  - Field-programmable gate arrays (FPGAs) are widely deployed on high-energy astrophysics telescopes to preprocess and reduce sensor data read out by front-end electronics. Across instruments, these computational pipelines have similar semantics, sharing common stages such as pedestal subtraction, signal integration, zero-suppression, island detection, and centroiding. However, diverse telescope designs require unique implementations of these algorithms, and the logic is often rewritten from scratch for a new instrument.

As an alternative, High-Level Synthesis (HLS) tools enable these algorithms to be implemented in a high-level language, which eases modifications and enables fast prototyping and deployment. Nonetheless, writing performant HLS code requires augmentation of the code with compiler-specific pragmas. In this work, we illustrate these challenges in the context of the Advanced Particle-astrophysics Telescope (APT), a proposed space-based observatory for gamma-ray sources, and its Antarctic Demonstrator (ADAPT). We implement its front-end algorithms using HLS, demonstrate the use of pragmas to enable optimizations, then explore speed and area tradeoffs, which are especially important given the limited power budget afforded by a satellite instrument. We demonstrate that with HLS, ADAPT will be able to process scintillating tile data from 200,000 gamma-ray events per second.
PB  - Washington University in St. Louis
PY  - 2024-04-09
T1  - FPGA Kernels for Front-End Pre-Processing on ADAPT V1
TI  - FPGA Kernels for Front-End Pre-Processing on ADAPT V1
UR  - https://data.library.wustl.edu/record/103658/files/adapt_fpga-computing-frontiers-2024.zip
UR  - https://data.library.wustl.edu/record/103658/files/README_DOI_10.7936_6RXS-103658_Sudvarg.txt
Y1  - 2024-04-09
ER  -